I am interested in the Forth chips by Chuck Moore's company, GreenArrays. They are extremely low-power and the engineers can calculate and measure the energy spent per instruction ("we can add two numbers in about 10 picoJoules (pJ)"). The GA144 has 144 F18A computers, "capable of up to 100 billion operations per second" and it has no clock.
As their President and acting VP of Engineering mentions in this video, their 180nm-process chips "run at the speed of silicon" and are roughly comparable to a 600 MHz CPU in MIPS. It is capable of stopping and starting when the instruction signal stops and starts, in about 100 picoseconds, or about a gate delay: "compare that to an MSP 530, five microseconds it takes to ramp its clock up and ramp its clock down each way ten microseconds of overhead time."
Now something that caught my attention in this presentation from 2020, relates to @stman's ideas about a novel FPGA architecture. At 28:45:
because an FPGA is not a place to make asynchronous logic
you're not going to practically be able to do that because with a lot of the tools you can't even control anything
you can't control the interconnects where the capacitance is
you can't control the strengths of the devices
you can't control anything that affects the time constants of signals
also some of the FPGA tools that the manufacturers provide intentionally randomize the layout every time you recompile it
At the beginning of the video, he says that the company is struggling to find a customer and that they are running bare-bones operations at the time. He says the computing industry would find what they are doing inconceivable, though. And they rely on their own VLSI CAD and IC simulation software written in Forth, which he also briefly describes and shows a preview.
